Great suggestion. I did implement the LPC Memory Read/Write and I/O Read/Write on my DE0-Nano platform when I was looking at integrating a TFT LCD, but I did not include it here since I never tested it out with these modchip design. Very true. Responding to all possible LPC transactions from the MCPX will certainly resolve this as suggested. Most definitely. In that case, a redesign incorporating a current driver is necessary. Another great suggestion. This was something I was considering but never got implemented. Most definitely. I am currently in the process.