SNES Multicart questions

Discussion in 'Modding and Hacking - Consoles and Electronics' started by jaskamakkara, Jun 20, 2017.

  1. jaskamakkara

    jaskamakkara Tinkering in the dark

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    Hi,

    I was thinking about making my own SNES repro multicart (just for fun). If I use an M29f033 chip (32Mb capacity), I can toggle the A21 line to switch between the top and bottom 16Mb banks to select from 2 different games, that much I understand. But, how about if I want to put on my chip 2x 8Mb games and 1x 16Mb game? Would that be easy to implement?

    I was thinking to use a binary counter that has its clock pin tied to the reset button on the console (pin 26 of the cart connector, I believe). If I disconnect A20 and A21 of the rom from the cart PCB and attach them to Q0 and Q1 of my counter, respectively, then I can select between 8Mb chunks of the rom, right? Like this:

    Code:
      Counter:   0      1      2      3
          A20:   0      1      0      1
          A21:   0      0      1      1
    8Mb chunk:  1st    2nd    3rd    4th
    This sequence would just cycle. However, when I want to play the 16Mb rom (let's say it's in the lower half of the memory) I don't want the binary counter to assert (neither low nor high) A20 as the SNES needs control over it in order to access the whole rom.

    Is there an easy way to make this work? Hopefully I've made my problem clear enough.

    Thanks

    EDIT - could I use a 157 logic chip to select if the SNES or my counter gets control of the A20 line?
     
    Last edited: Jun 20, 2017
  2. jaskamakkara

    jaskamakkara Tinkering in the dark

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    I think I've figured out a circuit that would make this work using a 393 binary counter and a 157 multiplexer. I've drawn this simple representation below, I've left off the power stuff, it's just to show the logic. The idea is that I could put 2x8Mb ROMs in the lower half of a M29f033, and a single 16Mb ROM in the upper half.

    The reset button (pin 26 of the cart connector) increments the binary counter, I only want it to count to 3 before resetting (as there are only 3 ROMs present on the chip) so the 2nd bank of the multiplexer &'s Q0 and Q1 with the output connected to the reset pin of the counter. When 3 is reached (11), we instead go back to 0.

    The 1st bank of the mux is to give control of the A20 line to the SNES when we're in the upper half of the 033 chip (i.e. the 16Mb ROM).

    [​IMG]

    The truth table should then be as follows:

    Code:
    COUNTER |  ROM PINS
    Q1   Q0 |  A21   A20
    0    0  |  0     0
    0    1  |  0     1
    1    0  |  1     SNES
    1    1  |  1     SNES    <- This is skipped by ANDing Q0 and Q1 to MR
    Anyway, I'm gonna test it out next week probably.
     
  3. zzattack

    zzattack Spirited Member

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    Either use an implementation using logic gates and a counter, or use a microcontroller. Both are feasible, a µC is maybe a little more flexible but also requires some code of course.

    That'll work.

    Correct.

    This is where a µC starts to get more attractive, as you can just tristate the pin without adding extra ics. Maybe the easiest way is to add a buffer ic. You can drive the enable pin on the buffer from A21 to tristate the output for the 16mbit ROM if you rearrange the game as 16+8+8 in that order.
     
  4. zzattack

    zzattack Spirited Member

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    Scratch what I wrote about tristating, because then you'd also need a way to drive the ROM A20 from SNES A20 (or A21 for LoROM).
    Instead, work from your truth table but include A20, then derive formulas.

    Code:
    Q1  Q0  A20 | RA20 RA21
     0   0   X  |  0     0   
     0   1   X  |  1     0   
     1   x   0  |  0     1   
     1   x   1  |  1     1   
    
    Clearly RA21 is easily derived :)
    Now I personally like to use NAND gates because they're pretty versatile. Let's see how many we need:
    RA20 = (!Q1 && Q0) || (Q1 && A20)
    = (!Q1 NAND A21) NAND (Q1 NAND A20)
    = ((Q1 NAND Q1) NAND A21) NAND (Q1 NAND A20)

    Only 4, so a single 7400 will do!

    edit: just took a look at what you came up with. That seems even better because now you already have the reset logic for the counter as well :)
     
    Last edited: Jun 22, 2017
  5. Pikmin

    Pikmin Resolute Member

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    Can you do one for 4 x 8MB games, Q0 Q1 Q2 and Q3. I've done it with a physical switch but haven't had time to play with a Reset solution.
    No SRAM games don't have the PIN 26 connected which is a shame, will have to wire directly to the cart pin :/

    Also if you are using games that need SRAM will have to upgrade it 128k, or just have one SRAM game and one without. Might have to rewire the SRAM too if a game has SRAM protection. Demon's Crest comes to mind
     
  6. zzattack

    zzattack Spirited Member

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    4x is easier. Just hook up Q0 to A20, Q1 to A21, Q2 to MR. No decoder needed.
    For SRAM it'll be similar. Highest address line (say A14) to Q1, then A13 to Q0.
    SRAM protection on Demon's Crest isn't really solved easily so better to just remove the check from the ROM.
     
  7. Pikmin

    Pikmin Resolute Member

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    Thanks. I still wouldn't mind a guide for us who have very basic understanding of electronics, if that :)
    Parts and wiring
     
  8. jaskamakkara

    jaskamakkara Tinkering in the dark

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    Sorry for not replying sooner, but thanks for your input. I think the solution I have there is fine, but also yours is nice. I am still quite new to digital logic so it's good to see different approaches.

    I have been thinking about this though, and it probably some from some basic misunderstanding of how this all works, but do I even need the multiplexer? Can I just OR Q0/A20? It seems to me that as long as we isolate the signals from the counter and from the SNES, we won't damage anything. In the case where we are in one of the 8Mb roms, surely the SNES will never try to drive A20 high (at least when accessing the ROM) since the game knows there's nothing there, right? Or I suppose the way the SNES mirrors its data might be a problem...

    What do you think?

    EDIT - I realise that in my case, using an OR gate will lose the 'count to 3' logic, but I am speaking generally now.
     
  9. zzattack

    zzattack Spirited Member

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    No. Maybe the SNES won't drive A20 high while it needs ROM contents on the bus, but it will drive A20 high for other things (i.e. sram access, for sure). If you also have a digital logic IC driving the bus the opposite way you're asking for trouble.
     
  10. jaskamakkara

    jaskamakkara Tinkering in the dark

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    Yeah, thanks. I should have known that but I get myself mixed up sometimes! :)

    By the way, if I have multiple lines I need to exchange control of (like if I have rom sizes over several powers of 2, like 4, 8 and 16Mb), what's the best IC for multiplexing those? I found the 4053 triple mux, but with only 3 muxes it might not be enough if I need SRAM decoding also, is there something better to your knowledge? Maybe I'm looking for the wrong type of chip...
     

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